SE97B_1
?NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 27 January 2010
14 of 53
NXP Semiconductors
SE97B
DDR memory module temp sensor with integrated SPD
A = ACK = Acknowledge bit. W = Write bit = 0. R = Read bit = 1.
Fig 7. SMBus/I
2
C-bus write to the Pointer register followed by a write data word
1 2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SCL
A6
A5
A4
A3
A2
A1
A0
SDA
D7
D6
D5
D4
D3
D2
D1
D0
device address and write
write register address
W
A
S
START
by host
ACK
by device
A
ACK
by device
(cont.)
(cont.)
002aab412
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SCL
D15 D14 D13 D12 D11 D10 D9
SDA
D7 D6
D5
D4
D3
D2
D1
D0
most significant byte data
least significant byte data
A
by host
ACK
by device
P
STOP
by host
D8
A
ACK
by device
A = ACK = Acknowledge bit. A
= NACK = No Acknowledge bit. W = Write bit = 0. R = Read bit = 1.
Fig 8. SMBus/I
2
C-bus write to Pointer register followed by a repeated START and an immediate data word read
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SCL
A6
A5
A4
A3
A2
A1
A0
SDA
D7
D6
D5
D4
D3
D2
D1
D0
device address and write
read register address
W
A
S
START
by host
ACK
by device
A
ACK
by device
(cont.)
(cont.)
1
2
3
4
5
6
7
8
9
D15 D14 D13 D12 D11 D10 D9
D8
returned most significant byte data
A
ACK
by host
SCL
SDA
1
2
3
4
5
6
7
8
9
SCL
A6
A5
A4
A3
A2
A1
A0
SDA
device address and read
R
A
SR
repeated
START
by host
ACK
by device
(cont.)
(cont.)
002aac686
1
2
3
4
5
6
7
8
9
D7
D6
D5
D4
D3
D2
D1
D0
returned least significant byte data
P
STOP
by host
A
NACK
by host
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